There would never be more than a 6x4 multiswitch. Not just because that is what is shown, but because there is no need for more than 6 inputs to the multiswitch - there are only 6 possible unique inputs, after all.
Thinking a bit about how the math works, here's what I came up with, let's see if you agree with my reasoning. There are two types of cross connect. I'll reference my RF5210 links - the functional block diagram in the datasheet, and Figure 3 in the article. The first type is the outgoing cross connect (OCC for short) which shares a chip's inputs with other chips (C1A & C2A in the article) The second type is the incoming cross connect (ICC) which receives inputs shared by other chips to cover inputs that a chip isn't receiving itself (G1 & G2 in the article; GM1 - GM4 in the datasheet)
A chip can never have more OCCs than it has inputs. Thus a RF5200 may have at most 3 OCCs, and the RF5201 at most 2. A chip can never have more ICCs than the width of its multiswitch, minus the minimum number of inputs it'll ever have. So if a RF5200 was only ever going to be used in the SWM5, it will have 3 ICC + 3 OCC. If a RF5201 was only ever going to be used in the SWM8/SWM16/SWM32, it will have 4 ICC + 2 OCC (but see below!)
So what about the RF5210? If you look at the reference design, it shows 2 ICC + 2 OCC. However, if you look at the functional block diagram in the other RF5210 document, there are 4 ICC + 4 OCC shown, along with a bit of tricky wiring. The LNA3 input isn't like the others, nor is the GM4 cross connect. It looks like this was designed to allow an OCC on one chip to feed LNA3 on a second chip, which is then re-fed to a third chip via the GM4 - which acts as a OCC in this case. Why do this? If you look at the first figure in the article and the text on the second page, the RF5210 was designed to support up to 12 channels via four chips. But with only two outgoing cross connects each for LNA1 and LNA2, a RF5210 can only directly share with two other chips, so this tricky wiring must make the 4 RF5210 configuration possible (I'll leave it to someone else to work out how everything would need to be wired!) Someone was probably really proud of themselves for that hack to save a couple pins on the RF5210
Now look at the prior art in the DSWM patent. It shows the socket numbers on the board C0, C2 and C6. What about the missing C4? Perhaps it shared some design elements with the board for the "Euro SWM" but there's no four chip configuration for us.
This got me thinking. Why does the damn prior art have such detail - showing the addresses for the SWM chips, the model of the chip, even showing the resistor values in the "AS" (Address Select) to choose between whether a chip is the C0, C2 or C6! But it leaves out the flex ports and legacy ports!! Why show such intricate detail everywhere else and then leave something as basic as flex ports and legacy ports out? Everyone knows all SWMs have flex ports. Well, except for those that don't - the SWM LNB!
That's what that prior art is. It was staring me in the face but I just didn't see it. The RF5201 probably has a very similar design to the RF5210, except for that tricky wiring. It has 2 OCCs and 4 ICCs, because in the SWM LNB that middle chip has no inputs and relies on the other two chips to share with it. There are no legacy ports shown because there are none in the SWM LNB.
Edited by slice1900, 03 January 2014 - 05:28 PM.