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Digital SWM theory and speculation


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#41 OFFLINE   slice1900

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Posted 01 January 2014 - 04:13 AM

The mention of cascading made me recall something I was intending to post but forgot. I stated in a recent post here that I assumed the ASWM used a 6x9 multiswitch in the front end. The "prior art" in the DSWM patent shows RF5201 chips being used, and I couldn't quite figure out how that worked since Entropic's site showed they had only two inputs, but they'd need three to work with a multiswitch at the front end. The problem of course was that the prior art showed four inputs, and that wasn't even including the flex ports it left out! It just didn't make sense. It turns out the "routing of LNA signals to all 3 chips" shown in the prior art (figure 2) don't count as inputs - the chips use side channels to share inputs with each other. So 3 chips x 2 inputs each = 6 inputs, now it makes sense!

 

Following this design, the SWM16's rather large legacy loss makes perfect sense, since each LNB input must be split six ways to go to the six RF5201 chips (three on each "SWM8 half") The loss from a two way split between "halves" followed by a balanced three way split inside the RF5201s exactly matches the "slightly over 10db" legacy loss reported for the SWM16. While this isn't much of an issue for the SWM output since it is gets the benefit of the AGC boost, based on this I'd expect the SWM8 may have a few db greater margin for loss at the input since it is only split three ways. If someone had a splitter and a SWM8 and SWM16, and a method for attenuating the input in stages (maybe by just adding splitters to one polarity while trying to tune a channel on that polarity via the SWM output on each of them using identical receivers) I'd expect the SWM16 to lose the signal "one splitter's worth" earlier. The SWM32 is reported to have an output that is about level with its input, so it must have a ~16 db AGC amp at the front end - to make up for the twelve way loss it suffers - and thus should be much more tolerant of weak input than the SWM8 or SWM16.

 

It also makes sense why Entropic's site shows the apparently unnecessary RF5200 - which is a 3 input / 3 output version of the 2 input / 3 output RF5201. That has to be what the SWM5 used, since if it used RF5201s it would lack sufficient inputs with which to support flex ports. I googled it and though I could only find a couple rather crappy stock photos, it looks like the SWM5 had only two legacy ports, which fits my hypothesis perfectly. The one thing I'm not clear on is why the SWM8 doesn't support the HD satellites on its legacy outputs, since there is no reason why it shouldn't be able to access any satellite via the RF5201. It would appear Directv must have put bandpass filters on these outputs that only allow the 950 - 1450 MHz range to pass, for some reason.

 

I figured all this out when I was looking at the RF5201 on Entropic's site. When I looked for similar products, I saw the RF5218 (used in European CSS systems) After a bit of googling I found some very detailed information on the very similar RF5210, which is sold under the RF Magic brand, which Entropic owns. It was easy to see how the RF5210 works, and the prior art in the DSWM patent with the very similar RF5201 suddenly made perfect sense. It turns out there is actually a 6x4 multiswitch in each of the three RF5201 chips in the ASWM (3 outputs for SWM, 1 for legacy) rather than external 6x9 multiswitch at the front end I was assuming (which would have been wrong anyway, I forgot about the legacy ports - it would have required a 6x12 multswitch)

 

Here are the links to a couple sources with functional diagrams of the RF5210:

 

http://52ebad10ee97e...T_RF5210_DS.pdf

http://rfdesign.com/...cs/703RFDF4.pdf

 

This brings up another point. The DSWM ASIC includes no legacy multiswitch, so there's an implementation choice for a DSWM module. Either integrate a legacy multiswitch in the module to allow it to support the 4 legacy + 2 flex ports as the SWM16 and SWM32 do, or use splitters at the front end to provide cascade outputs. Those "cascade ports" would not act as legacy ports, because they'd be polarity locked (i.e. the 99/101 even port would always output only that polarity and an attached receiver could not change it) You'd lose ~5db on each cascade from that splitter loss, so you couldn't cascade very far unless it included an amplifier.

 

The pictures of the DSWM13 shows the traditional six outputs, but Stuart stated "the DSWM13 doesn't have any legacy ports, despite what you see" so perhaps they're cascade only ports. There's also the possibility they do absolutely nothing in the DSWM13. That might be the case if, for example, they built it using the chassis they plan to share with a future DSWM23, which will have some sort of legacy/cascade output. Maybe I'm wrong, but I kind of get the impression that Directv is progressively discouraging cascading more and more, so I guess I wouldn't have been shocked if the DSWM13 didn't have those six outputs at all. Of course, the reverse could be true, and they will support cascading with the DSWM13, but the DSWM23 will leave those ports out. Oh well, once Stuart is allowed to give us more details we can learn what those ports on the DSWM13 are/do, and it will provide some direction for future speculation :)


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#42 OFFLINE   veryoldschool

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Posted 01 January 2014 - 02:32 PM

[Moderator hat on]

 

Is there any interest in this?

 

[/Moderator hat off]


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#43 OFFLINE   P Smith

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Posted 01 January 2014 - 03:04 PM

practically for himself only



#44 OFFLINE   HoTat2

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Posted 02 January 2014 - 01:04 PM

practically for himself only

Lots of interest here ... :)

 

Though it did take me a while to quite understand it. 

 

Hope I got it right as described in my next post.


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#45 ONLINE   Stuart Sweet

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Posted 02 January 2014 - 01:25 PM

The purpose of a discussion thread, though, is to discuss... not to work on the rough draft of your own personal white paper. Is there any more to be said? More importantly, is there anyone else besides one person saying it? 


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#46 OFFLINE   HoTat2

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Posted 02 January 2014 - 02:15 PM

So slice to summarize your latest findings here.

 

If I'm understanding this correctly, each RF5201 chip used in the present ASWM has an integrated 6 x 4 multiswitch of which 2 (3 in a 7 x 4 MS for the RF5200 and 5210) of the 6 inputs of the MS are "officially" labeled as "LNB inputs" The other 4 are only used for cross-connects when paralleling the chips?

 

So for the DIRECTV ASWM starting at the top of the diagram of fig. 2, one chip will receive the two LNB inputs from the Sat B and B+C lines, plus feed those sames lines to the other two parallel chips on two of their cross-connect inputs.

 

Though not illustrated the chip in the middle of the patent diagram will have the two LNB inputs from the flexports as well as feed the same to the two other chips in parallel above and below it in the diagram via two of their cross-connect inputs.

 

And the third chip will receive the two Sat A LNB inputs as well as feed it to the two other chips in parallel on two of their cross-connect inputs.

 

So again to reference the ASWM diagram illustrated the patent (i.e. Fig. 2).

 

Chip "C0" has 6 inputs which are Sat B and B+C from the LNBs, Sat A (2 lines) LNBs via cross-connects, and two flexport lines via cross-connects.

 

Chip "C2" 6 inputs are the two flexports on the LNB inputs though not illustrated in the diagram, the two Sat B and B+C lines via cross-connects, and two Sat A LNB lines via cross-connects, 

 

Chip "C6" 6 inputs are the two Sat A lines from the LNBs, the two Sat B and B+C lines via cross-connects, and the two flexport lines via cross-connects.

 

Hope all this is correct ... :)

 

... The one thing I'm not clear on is why the SWM8 doesn't support the HD satellites on its legacy outputs, since there is no reason why it shouldn't be able to access any satellite via the RF5201. It would appear Directv must have put bandpass filters on these outputs that only allow the 950 - 1450 MHz range to pass, for some reason. 

 

Actually, it's my understanding that the SWiM-8 passes both the Ku and Ka-hi bands, but not the Ka-lo.

 

This was corrected in the later SWiM-16 of course.

 

It's just a guess and maybe a bit of a reach as well, but I wonder if there was some sort of design error in the original SWiM-8 external multiswitch where the European 950-2150 MHz frequency range for legacy ports of the SWiM switch for that market was also put into DIRECTV's version here in the U.S.?    


Edited by HoTat2, 02 January 2014 - 02:21 PM.

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#47 OFFLINE   slice1900

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Posted 02 January 2014 - 03:54 PM

I think we're on the same page with the ASWM.

 

I wasn't aware that the SWM8 passed Ka hi via the legacy ports, that makes it even more strange. Your theory might be right, or it might have something to do with the off air port (though I think I read somewhere that the SWM8 doesn't pass OTA via the legacy ports) I guess the reason for the SWM8 not passing B band will remain a mystery.

 

Since the DSWM ASIC has no provision for output of legacy bands, a DSWM module would have to provide any legacy/cascade ports by splitting the 6 LNB inputs or adding a multiswitch within the module. Either solution would result in notably less thru loss than the SWM16 exhibits through its legacy ports. But even with near zero loss, IIRC Directv only supports two levels of cascade with the SWM32. I have no idea whether they'd consider cascade or legacy support important in future products, given that they've abandoned legacy support on receivers/DVRs introduced the past few years.


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#48 OFFLINE   HoTat2

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Posted 02 January 2014 - 07:34 PM

I think we're on the same page with the ASWM. ...

 

 

Glad to hear that ... :)

 

But if this is definitely how the ASWM is wired, be it the external multiswitch or integrated SWiM LNB, then it must use the standard Sat A, B, B+C (250-750 MHz, 950-1450 MHz, 1650-2150 MHz) frequency stack on its 4 inputs plus 2 additional inputs for the flexports.

 

So that leaves me wondering then, in what way is converting all the satellite bands to the ~250-760 MHz range illustrated in the other patent about using a single LO and freq. divider chips considered "the prior art?" :confused:    


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#49 OFFLINE   inkahauts

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Posted 02 January 2014 - 08:35 PM

A theory in the swim8 legacy outputs. A swim8 is a swim5 with more channels I believe is all. That product never saw real production. But since there's only three legacy outs IMHO it was strictly meant for sd boxes so they probably didn't care about passing all signals anyway. And three legacy out plus 5 swim channels were a total of 8 so I have a feeling the first interation was all about a couple Hi Definition receivers and a couple sd for people. They realized their mistake and pumped it up to 8 possible Hi Definition tuners on swim. And they just left the legacy outputs alone at the time.

#50 OFFLINE   slice1900

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Posted 02 January 2014 - 10:26 PM

Glad to hear that ... :)

 

But if this is definitely how the ASWM is wired, be it the external multiswitch or integrated SWiM LNB, then it must use the standard Sat A, B, B+C (250-750 MHz, 950-1450 MHz, 1650-2150 MHz) frequency stack on its 4 inputs plus 2 additional inputs for the flexports.

 

So that leaves me wondering then, in what way is converting all the satellite bands to the ~250-760 MHz range illustrated in the other patent about using a single LO and freq. divider chips considered "the prior art?" :confused:    

 

 

Well, recall that the 'single LO' patent is for a LNB, so the prior art within would likely be for a SWM LNB, not a SWM module. If you look at the RF5210 block diagram in the datasheet I linked to previously, the four (or six in the case of Directv's ASWM) LNBs are passed through the internal multiswitch intact, and not split/converted to individual bands in the 250 - 760 MHz range. The three multiswitch outputs pass through a mixer, a SAW filter etc. which isolates the 'transponder of interest' and places it at the proper frequency for the intended SWM channel.

 

There's no way to know for sure where the prior art from the single LO patent may fit in. Maybe it is used in the SWM LNB - but if so it uses something other than the RF5201 FTM. Maybe this prior art was designed for a first embodiment version of the DSWM but they decided not to go further with it (too expensive, too power hungry, whatever) Without more information, we can only guess. If we could open a SWM LNB and Entropic is kind enough to mark their ICs, we could see what's in there. That might point us in the right direction.


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#51 OFFLINE   slice1900

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Posted 02 January 2014 - 10:32 PM

A theory in the swim8 legacy outputs. A swim8 is a swim5 with more channels I believe is all. That product never saw real production. But since there's only three legacy outs IMHO it was strictly meant for sd boxes so they probably didn't care about passing all signals anyway. And three legacy out plus 5 swim channels were a total of 8 so I have a feeling the first interation was all about a couple Hi Definition receivers and a couple sd for people. They realized their mistake and pumped it up to 8 possible Hi Definition tuners on swim. And they just left the legacy outputs alone at the time.

 

My belief is that the SWM8 uses three RF5201 chips (2 inputs each for a total of 6 LNBs) and therefore has three legacy outputs, while the SWM5 used two RF5200 chips (3 inputs each for a total of 6 LNBs) that would leave it with only two legacy outputs.

 

At least the stock photos I was able to find of the SWM5 when I looked recently appeared to show only two legacy outputs. If it does in fact have three, please correct me.


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#52 OFFLINE   HoTat2

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Posted 03 January 2014 - 11:30 AM

Yep, appears only two legacy ports on the short lived and now long defunct SWM-5 module, which strongly does suggest two 3 input RF5200 chips in parallel.  

 

From an early SWM training document; 

 

SWM-8 vs. -5 Module Comparison.png

 

Must have been the two Sat A lines and + 1 flexport line + three cross-connect inputs into 1 chip.

 

And the two Sat B/B+C lines + 1 flexport line + three cross-connect inputs into the other chip.

 

Thus each RF5200 chip's 7 x 4 integrated multiswitch had only 6 of it's 7 total inputs used I guess.


Edited by HoTat2, 03 January 2014 - 11:34 AM.

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#53 OFFLINE   slice1900

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Posted 03 January 2014 - 01:52 PM

Why would it have a 7x4 with unused input? I would think it would have a 6x4, same as the RF5201.


Edited by slice1900, 03 January 2014 - 01:53 PM.

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#54 OFFLINE   HoTat2

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Posted 03 January 2014 - 02:12 PM

Isn't (or more appropriately "wouldn't") the count for both chips in the SWiM-5 be three inputs from the LNBs plus three more inputs from cross-connects of either the Sat A plus 1 flexport or Sat B/B+C plus 1 flexport from the other chip?

 

3 + 3 = 6 inputs total per chip.

 

That is, one cross-connect input is unused on each RF5200 chip. 


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#55 OFFLINE   slice1900

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Posted 03 January 2014 - 05:20 PM

There would never be more than a 6x4 multiswitch. Not just because that is what is shown, but because there is no need for more than 6 inputs to the multiswitch - there are only 6 possible unique inputs, after all.

 

Thinking a bit about how the math works, here's what I came up with, let's see if you agree with my reasoning. There are two types of cross connect. I'll reference my RF5210 links - the functional block diagram in the datasheet, and Figure 3 in the article. The first type is the outgoing cross connect (OCC for short) which shares a chip's inputs with other chips (C1A & C2A in the article) The second type is the incoming cross connect (ICC) which receives inputs shared by other chips to cover inputs that a chip isn't receiving itself (G1 & G2 in the article; GM1 - GM4 in the datasheet)

 

A chip can never have more OCCs than it has inputs. Thus a RF5200 may have at most 3 OCCs, and the RF5201 at most 2. A chip can never have more ICCs than the width of its multiswitch, minus the minimum number of inputs it'll ever have. So if a RF5200 was only ever going to be used in the SWM5, it will have 3 ICC + 3 OCC. If a RF5201 was only ever going to be used in the SWM8/SWM16/SWM32, it will have 4 ICC + 2 OCC (but see below!)

 

So what about the RF5210? If you look at the reference design, it shows 2 ICC + 2 OCC. However, if you look at the functional block diagram in the other RF5210 document, there are 4 ICC + 4 OCC shown, along with a bit of tricky wiring. The LNA3 input isn't like the others, nor is the GM4 cross connect. It looks like this was designed to allow an OCC on one chip to feed LNA3 on a second chip, which is then re-fed to a third chip via the GM4 - which acts as a OCC in this case. Why do this? If you look at the first figure in the article and the text on the second page, the RF5210 was designed to support up to 12 channels via four chips. But with only two outgoing cross connects each for LNA1 and LNA2, a RF5210 can only directly share with two other chips, so this tricky wiring must make the 4 RF5210 configuration possible (I'll leave it to someone else to work out how everything would need to be wired!) Someone was probably really proud of themselves for that hack to save a couple pins on the RF5210 :)

 

Now look at the prior art in the DSWM patent. It shows the socket numbers on the board C0, C2 and C6. What about the missing C4? Perhaps it shared some design elements with the board for the "Euro SWM" but there's no four chip configuration for us.

 

This got me thinking. Why does the damn prior art have such detail - showing the addresses for the SWM chips, the model of the chip, even showing the resistor values in the "AS" (Address Select) to choose between whether a chip is the C0, C2 or C6! But it leaves out the flex ports and legacy ports!! Why show such intricate detail everywhere else and then leave something as basic as flex ports and legacy ports out? Everyone knows all SWMs have flex ports. Well, except for those that don't - the SWM LNB!

 

That's what that prior art is. It was staring me in the face but I just didn't see it. The RF5201 probably has a very similar design to the RF5210, except for that tricky wiring. It has 2 OCCs and 4 ICCs, because in the SWM LNB that middle chip has no inputs and relies on the other two chips to share with it. There are no legacy ports shown because there are none in the SWM LNB.


Edited by slice1900, 03 January 2014 - 05:28 PM.

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#56 OFFLINE   HoTat2

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Posted 05 January 2014 - 11:34 AM

There would never be more than a 6x4 multiswitch. Not just because that is what is shown, but because there is no need for more than 6 inputs to the multiswitch - there are only 6 possible unique inputs, after all. ...Thinking a bit about how the math works, here's what I came up with, let's see if you agree with my reasoning. ... There are two types of cross connect. I'll reference my RF5210 links - the functional block diagram in the datasheet, and Figure 3 in the article. The first type is the outgoing cross connect (OCC for short) which shares a chip's inputs with other chips (C1A & C2A in the article) The second type is the incoming cross connect (ICC) which receives inputs shared by other chips to cover inputs that a chip isn't receiving itself (G1 & G2 in the article; GM1 - GM4 in the datasheet) ... A chip can never have more OCCs than it has inputs. Thus a RF5200 may have at most 3 OCCs, and the RF5201 at most 2. A chip can never have more ICCs than the width of its multiswitch, minus the minimum number of inputs it'll ever have. So if a RF5200 was only ever going to be used in the SWM5, it will have 3 ICC + 3 OCC.

 

 

 

OK, my bad ...;

 

 

I assumed that if the early RF5200 chips likely used in the SWiM-5 module were similar in design to the future RF5210 as you suggested earlier by having three LNB inputs (though would not have the "tricky wiring" for the third LNB input of course) that would have amounted to three LNB inputs and four ICCs for a total of seven overall inputs to it's integrated switch.

 

 

... That's what that prior art is. It was staring me in the face but I just didn't see it. The RF5201 probably has a very similar design to the RF5210, except for that tricky wiring. It has 2 OCCs and 4 ICCs, because in the SWM LNB that middle chip has no inputs and relies on the other two chips to share with it. There are no legacy ports shown because there are none in the SWM LNB.

 

 

Wouldn't that actually be 4 OCC and 4 ICCs for the RF5201 if it is indeed "very similar" to the RF5210, less the "tricky wiring" (and less a third LNB input too)? 

 

And thus to summarize for your latest understanding for ASWM with three RF5201s.

 

The SWM LNB case means the two outer chips each have two unused ICCs, and the middle chip has two unused LNB inputs and all four OCCs unused as well? 


Edited by HoTat2, 05 January 2014 - 11:39 AM.

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#57 OFFLINE   slice1900

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Posted 05 January 2014 - 02:09 PM

And thus to summarize for your latest understanding for ASWM with three RF5201s.

 

The SWM LNB case means the two outer chips each have two unused ICCs, and the middle chip has two unused LNB inputs and all four OCCs unused as well? 

 

If that diagram is accurate, and given the level of detail it is showing and how it matches everything else so perfectly I think that's safe to say, then that is what you should see if you disassembled a SWM LNB. The middle (C2) chip would have fewer board traces connected to its pins.

 

 

Wouldn't that actually be 4 OCC and 4 ICCs for the RF5201 if it is indeed "very similar" to the RF5210, less the "tricky wiring" (and less a third LNB input too)?

 

Yes, thanks for correcting me here. Of course it must have 4 OCCs, so that it can distribute its two inputs to two other chips.


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#58 OFFLINE   slice1900

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Posted 05 January 2014 - 02:41 PM

Something I just noticed when I visited Entropic's site to check on the RF5200/5201/5210 information for that last post. They have a product called EN5400, which is none other than our friend the DSWM ASIC. It is listed as the "Digital Version of Channel Stack Switch (CSS)", which it states supports 14 IF inputs at 250-750 MHz and provides 20 user channel outputs.

 

Not sure why it is only 20 channels when the ASIC is capable of 23 "user channels" (the guide channel would be the 24th) Perhaps it is possible it was cut down a bit to reduce the top level frequency to something closer to ASWM's top frequency? Maybe that's the maximum number receivers can handle, or the limit for some older receivers? On the other hand, it is also possible this is a different, slightly earlier, version of the DSWM ASIC.

 

This is why I'm quite curious to see the DSWM13's power consumption when that information is made public, as Stuart seemed to imply it was at a level that would make it inappropriate for a DSWM LNB (though I may have misunderstood) I found information that indicates there are at least two generations of DSWM ASIC, and the second generation was/is/will be used in both "standalone and ODU" implementations. The DSWM LNB may not be that far away.


Edited by slice1900, 05 January 2014 - 02:49 PM.

SL5, PI-6S, SA-6AL 3xSWM16, 21 H20-100, 1 H20-600, 7 H24-700/AM21


#59 OFFLINE   inkahauts

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Posted 05 January 2014 - 03:04 PM

By the way I double checked my swim5 and it is only two legacy outs. I just forgot it's been so long since I looked at it.

#60 OFFLINE   veryoldschool

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Posted 05 January 2014 - 04:30 PM

This is why I'm quite curious to see the DSWM13's power consumption when that information is made public, as Stuart seemed to imply it was at a level that would make it inappropriate for a DSWM LNB (though I may have misunderstood)..

I'm going to go with this.

The output power of the DSWM13 means it's only compatible for its intended use.


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